In a liquid crystal display device, an electric field applied to each pixel of the liquid crystal panel is adjusted to change the orientation direction of liquid crystal molecules of each pixel. The liquid crystal molecules of each pixel will rotate the polarization direction of light when an electric field is applied across the pixel. Thus, the transmittance of the liquid crystal cell could be changed in order to display the polarized light of the successive frames on the liquid crystal panel of the liquid crystal display device. However, liquid crystal cells vary in transmittance relatively slowly. Therefore, the desired orientation direction of liquid crystal molecules of pixels could not be reached during a predetermined period when the electric field is applied to each pixel of the liquid crystal panel.
The pixel response speed in current liquid crystal display devices are slower than that in Cathode Ray Tubes (CRTs). Consequently, in displaying moving images in particular, blurs in which data of previous frames appears overlapped, so called image trails, tend to occur in liquid crystal display devices. This phenomenon is unique to liquid crystal display devices, but is not seen in CRTs. To reduce image trails and bring the moving image display performance close to that of CRTs, there has been developed a technology called an impulse drive system which imitates the waveforms of applied voltages in CRTs. In addition, in conventional hold-type displays, an overdrive method has been developed to improve the moving image display performance. The overdrive method is a technique of writing larger magnitude data signals than the actual data signals to the liquid crystal cells so that the liquid crystal cells reach their target transmittance within a frame period. In the case where the liquid crystal display device has a refresh rate of 60 Hz, for example, one frame period is about 16.6 ms. Therefore, the video input data rate of the over-drive circuit is limited to the refresh rate or frame rate of the liquid crystal display device, namely the fastest response speed of the liquid crystal display device is 16.6 ms even though the video input data rate of the overdrive circuit exceeds 60 Hz. However, since the liquid crystal cells having a response time of 16.6 ms could not satisfy characteristics of visual perception of humans, there exists the motion blur phenomenon in displaying moving pictures. The technical trend in currently available high-quality liquid crystal display devices is to improve the response time of the liquid crystal display devices.
In order to improve the response time of the liquid crystal display device, one method is to increase the frame rate of the liquid crystal display device. In the case where the liquid crystal display device has a faster frame rate of 120 Hz, for example, one frame is about 8.3 ms. Thus, the overdrive circuit could change the response time of the liquid crystal display device from 16.6 ms to 8.3 ms. This means that the moving image display performance could be improved. Accordingly, it is well established that the main factor for improving the moving image display performance is the use of a high frame rate of the liquid crystal display device and today's well-accepted frame rate is 120 Hz and above.
The number of data bus lines of the input interface of a liquid crystal display panel has to be doubled because the amount of the image data transmission for a liquid crystal display device running at the 120 Hz frame rate is double. Referring to FIG. 1, a general block diagram of a driving circuit in a conventional liquid crystal display device is illustrated. As shown in FIG. 1, in the conventional image data transmission technique, image data is divided into an odd part 110 and an even part 120, wherein one half of the data bus lines are utilized to transmit the odd part 110 of the image data and the other half of the data bus lines are utilized to transmit the even part 120 of the image data. The odd part 110 of the image data includes several odd sections 110A, 110B, 110C, and 110D of the image data. Each odd section contains a part of the image data which is delivered by at least one data bus line. Additionally, the even part 120 of the image data includes several even sections 120A, 120B, 120C, and 120D of the image data. Each even section also contains a part of the image data which is delivered by at least one data bus line. In this case, a single timing controller could not deal with such a large amount of image data that another timing controller should be added to assist processing of the image data. As shown in FIG. 1, there are a first timing controller 160 and a second timing controller 170.
In the above-mentioned case, the conventional technique delivers the odd part 110 of the image data and the even part 120 of the image data to a pre-processor 130. The pre-processor 130 rearranges the odd part 110 of the image data and the even part 120 of the image data and then divides the rearranged image data into a left part 140 of the image data and a right part 150 of the image data. The left part 140 of the image data and the right part 150 of the image data are individually delivered to the first timing controller 160 and the second timing controller 170, respectively. Through the first timing controller 160 and the second timing controller 170, the scan driver (not shown in the figure) and data drivers 181, 182, 183, and 184 display the whole image data 190 on the liquid display panel.
Referring to FIG. 2, a general block diagram of a conventional data driver, such as 181, 182, 183, or 184, is illustrated. As shown in FIG. 2, the data driver comprises a shift register 210, a first line buffer 220, a second line buffer 230, and a D/A converter 240. The data driver utilizes a signal EIO1 and a clock signal CLK to input digital image data DATA into the first line buffer 220. The signal EIO1 is synchronized with the conventional horizontal synchronizing signal in the liquid crystal display device. In other words, the shift register 210 shifts the signal EIO1 and utilizes the clock signal CLK to generate a latch clock signal for serially writing the digital image data to the first line buffer 220. After the digital image data has been stored in the first line buffer 220 respectively, the shift register 210 will deliver a signal EIO2 to enable the shift register of the next data driver to store the digital image data in the first line buffer thereof.
When the first line buffers 220 of all data drivers have stored the digital image data, the first timing controller 160 and the second timing controller 170 deliver a signal LOAD to the second line buffers of all data drivers. At this moment, the second line buffer 230 latches the digital image data stored in the first line buffer 220 and delivers the digital image data to the D/A converter 240. The D/A converter 240 utilizes a gamma voltage generator (not shown in the figure) to generate a gamma voltage GV to be used as a reference voltage of the D/A converter 240 so as to convert the digital image data into analog image data.
In the conventional technique, the liquid crystal display device needs two timing controllers (the first timing controller 160 and the second timing controller 170 as shown in FIG. 1) and the pre-processor 130 to drive the liquid crystal display panel. As a result, the connection of the circuitry is too complex which will generally require an increase in the area of a printed circuit board (PCB) for mounting the circuitry thereon and hence an increase in the production cost. However, if the PCB area is not increased, there is a possibility that undesirable effects of electromagnetic interference (“EMI”) will occur.